发明名称 Verify pulse delay to improve resistance window
摘要 Structures and methods for controlling operation of a programmable impedance element are disclosed herein. In one embodiment, a method of programming/erasing the programmable impedance element can include: (i) receiving a program/erase command to be executed on the programmable impedance element; (ii) generating, in response to the program/erase command, a program/erase pulse for performing a program/erase operation on the programmable impedance element; (iii) generating a time delay from the program/erase pulse, where the time delay includes additional delay to allow for at least partial dissipation of one or more effects caused by the program/erase operation; and (iv) performing, after the time delay has elapsed, a verify operation to determine if the program/erase operation has successfully programmed/erased the programmable impedance element.
申请公布号 US9208876(B1) 申请公布日期 2015.12.08
申请号 US201514663719 申请日期 2015.03.20
申请人 Adesto Technologies Corporation 发明人 Cheng Chuanding;Hollmer Shane
分类号 G11C11/00;G11C13/00 主分类号 G11C11/00
代理机构 代理人 Stephens, Jr. Michael C.
主权项 1. A method of programming a programmable impedance element, the method comprising: a) receiving a program command to be executed on the programmable impedance element; b) generating, in response to the program command, a program pulse for performing a program operation on the programmable impedance element; c) generating a time delay from the program pulse, wherein the time delay comprises a duration sufficient to allow for at least partial dissipation of one or more effects caused by the program operation, wherein the generating the time delay comprises accessing a data value from a register, wherein the data value corresponds to a time delay set by characterization of the programmable impedance element; and d) performing, after the time delay has elapsed, a verify operation to determine if the program operation has successfully programmed the programmable impedance element.
地址 Sunnyvale CA US