Semiconductor construction, semiconductor unit, and manufacturing method thereof

摘要

A semiconductor structure and its manufacturing method including multiple steps are provided. First, a patterned circuit board having a substrate and a patterned circuit layer is provided. The substrate includes a first surface, a second surface, at least one connecting channel, and at least one conductive through hole, wherein patterned circuit layer is disposed on the first surface, a second surface, and the inside wall of the conductive through hole. Then, the patterned circuit board is disposed on a carrier, and the patterned circuit layer disposed on one of the first surface and the second surface is touched with the carrier. Then, a filling process is applied. A filling material flows to the conductive through hole via the first surface or the second surface from the connecting channel. Then, a package material is provided to produce a semiconductor structure.

主权项

1. A semiconductor structure comprising:
a substrate having a first surface, a second surface, at least one through hole, and at least one connecting channel; a patterned circuit layer disposed on the first surface, the second surface, and in each of the at least one through hole, wherein the patterned circuit layer in the at least one through hole is electrically connected to the patterned circuit layer on the first and second surfaces; at least one chip bonded on the first surface and electrically connected to the patterned circuit layer; a filling material having a first part, a second part, and a third part, wherein the first part fills the at least one through hole, the third part fills all of the at least one connecting channel, and the second part is connected between the first part and third part; and a packaging material covering each of the at least one chip and a part of the substrate, with the packaging material not connected with the filling material; wherein a surface of the second part of the filling material is higher than a top of the first surface and is lower than or equal to a top of the patterned circuit layer corresponding to the first surface.