发明名称 Method of reducing the heights of source-drain sidewall spacers of FinFETs through etching
摘要 A method of forming an integrated circuit device includes forming a gate stack covering a middle portion of a semiconductor fin, forming a gate spacer layer over the gate stack and the semiconductor fin, and patterning the gate spacer layer. The resulting spacers include a gate spacer on a sidewall of the gate stack, and a fin spacer on a sidewall of an end portion of the semiconductor fin. The fin spacer is then etched. When the etching is finished, a height of the fin spacer is smaller than about a half of the height of the semiconductor fin.
申请公布号 US9209302(B2) 申请公布日期 2015.12.08
申请号 US201314090763 申请日期 2013.11.26
申请人 Taiwan Semiconductor Manufacturing Company, Ltd. 发明人 Tsai Tsung-Che;Chang Yi-Feng;Lee Jam-Wem
分类号 H01L21/3205;H01L29/78;H01L29/66 主分类号 H01L21/3205
代理机构 Slater & Matsil, L.L.P. 代理人 Slater & Matsil, L.L.P.
主权项 1. A method comprising: forming a gate stack covering a middle portion of a semiconductor fin; forming a gate spacer layer over the gate stack and the semiconductor fin; patterning the gate spacer layer to form: a gate spacer on a sidewall of the gate stack; anda fin spacer on a sidewall of an end portion of the semiconductor fin; and etching the fin spacer, wherein when the step of etching the fin spacer is finished, a first height of the fin spacer is smaller than about a half of a second height of the semiconductor fin.
地址 Hsin-Chu TW
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