Customized shield plate for a field effect transistor

摘要

A customized shield plate field effect transistor (FET) includes a semiconductor layer, a gate dielectric, a gate electrode, and at least one customized shield plate. The shield plate includes a conductive layer overlying a portion of the gate electrode, one of the gate electrode sidewalls, and a portion of the substrate adjacent to the sidewall. The shield plate defines a customized shield plate edge at its lateral boundary. A distance between the customized shield plate edge and the sidewall of the gate electrode varies along a length of the sidewall. The customized shield plate edge may form triangular, curved, and other shaped shield plate elements. The configuration of the customized shield plate edge may reduce the area of the resulting capacitor and thereby achieve lower parasitic capacitance associated with the FET. The FET may be implemented as a lateral diffused MOS (LDMOS) transistor suitable for high power radio frequency applications.

主权项

1. A semiconductor fabrication process, comprising:
depositing a shield interlevel dielectric (ILD) on a semiconductor wafer, the semiconductor wafer including a gate electrode overlying a gate dielectric overlying a semiconductor substrate, the semiconductor substrate comprising a channel region underlying the gate electrode laterally positioned between a drift region and a source region, the drift region positioned between the channel region and a drain region, wherein the gate electrode comprises a gate electrode of a lateral diffused metal oxide semiconductor transistor; depositing a shield plate layer overlying the shield ILD; patterning the shield plate layer to form a customized shield plate, the customized shield plate overlying a portion of the gate electrode and a portion of the drift region, the customized shield plate defining a customized shield plate edge, wherein a distance between the customized shield plate edge and a sidewall of the gate electrode proximal to the drain region varies along a length of the customized shield plate edge; after patterning the shield plate layer, depositing a second shield plate layer overlying the shield ILD; and patterning the second shield plate layer to form a second customized shield plate, the second customized shield plate overlying a portion of the gate electrode and a portion of the drift region, the second customized shield plate defining a second customized shield plate edge, wherein a distance between the second customized shield plate edge and the sidewall of the gate electrode proximal to the drain region varies along a length of the second customized shield plate edge.