发明名称 Operation method of multi-level memory
摘要 An operation method of a multi-level memory is provided. A first read voltage lower than a standard read voltage is applied to a doped region in a substrate at one side of a control gate of the memory, so as to determine whether a first storage position and a second storage position are both at the lowest level.
申请公布号 US9208892(B2) 申请公布日期 2015.12.08
申请号 US201313943691 申请日期 2013.07.16
申请人 MACRONIX International Co., Ltd. 发明人 Wu Guan-Wei;Chang Yao-Wen;Yang I-Chen;Lu Tao-Cheng
分类号 G11C16/04;G11C16/26;G11C16/34 主分类号 G11C16/04
代理机构 J.C. Patents 代理人 J.C. Patents
主权项 1. An operation method of a multi-level memory, suitable for a multi-level memory having a first storage position and a second storage position, wherein multiple levels of the multi-level memory correspond to different read current values and the multi-level memory comprises a substrate, a control gate, a charge storage layer located between the substrate and the control gate, and a plurality of doped regions located in the substrate beside the control gate, the operation method comprising: applying a first read voltage lower than a standard read voltage to one of the doped regions in the substrate at one side of the control gate, so as to determine whether the first storage position and the second storage position are both at a lowest level, wherein the lowest level is defined as the level of the storage position when no charge is stored therein.
地址 Hsinchu TW