发明名称 Semiconductor device and method for driving semiconductor device, and electronic device
摘要 The memory circuit has a first writing mode in which data can be retained for a long time and a second writing mode in which data can be written at high speed. The memory circuit in which data reading is performed on the basis of a determined conductive state of a transistor includes first and second capacitor parts that are connected through a switch and retain electric charge corresponding to the data. The first writing mode is a mode where the switch is on and electric charge corresponding to the data is accumulated in the first and second capacitor parts that are electrically connected. The second writing mode is a mode where the switch is off, electric charge corresponding to the data is accumulated in the first capacitor part, and electric charge corresponding to the data is not accumulated in the second capacitor part.
申请公布号 US9208849(B2) 申请公布日期 2015.12.08
申请号 US201313803602 申请日期 2013.03.14
申请人 Semiconductor Energy Laboratory Co., Ltd. 发明人 Yamamoto Roh
分类号 G11C11/24;H01L27/115;G11C11/403;G11C11/405 主分类号 G11C11/24
代理机构 Fish & Richardson P.C. 代理人 Fish & Richardson P.C.
主权项 1. A semiconductor device comprising: a memory circuit comprising: a first transistor; a second transistor; a third transistor; and a first capacitor, wherein a gate of the first transistor is electrically connected to one of a source and a drain of the second transistor, wherein the one of the source and the drain of the second transistor is electrically connected to one of a source and a drain of the third transistor, wherein the other of the source and the drain of the third transistor is electrically connected to a first electrode of the first capacitor, wherein one of a source and a drain of the first transistor is electrically connected to a read line, wherein the other of the source and the drain of the first transistor is electrically connected to a power supply line, wherein a gate of the second transistor is electrically connected to a switching signal line, wherein the other of the source and the drain of the second transistor is electrically connected to the read line, wherein a gate of the third transistor is electrically connected to a word line, wherein a second electrode of the first capacitor is electrically connected to a read selection line, wherein each of the second transistor and the third transistor comprises a channel formation region comprising an oxide semiconductor, and wherein the first transistor comprises a channel formation region comprising silicon.
地址 Kanagawa-ken JP