发明名称 Technique for controlling positions of stacked dies
摘要 An assembly component and a technique for assembling a chip package using the assembly component are described. This chip package includes a set of semiconductor dies that are arranged in a stack in a vertical direction, which are offset from each other in a horizontal direction to define a stepped terrace at one side of the vertical stack. Moreover, the chip package may be assembled using the assembly component. In particular, the assembly component may include a pair of stepped terraces that approximately mirror the stepped terrace of the chip package and which provide vertical position references for an assembly tool that positions the set of semiconductor dies in the vertical stack during assembly of the chip package.
申请公布号 US9209165(B2) 申请公布日期 2015.12.08
申请号 US201314059302 申请日期 2013.10.21
申请人 ORACLE INTERNATIONAL CORPORATION 发明人 Dayringer Michael H. S.;Hopkins R. David;Chow Alex
分类号 H01L25/065;H01L25/00;H01L23/544;H01L23/00 主分类号 H01L25/065
代理机构 Park, Vaughan, Fleming & Dowler LLP 代理人 Park, Vaughan, Fleming & Dowler LLP ;Stupp Steven E.
主权项 1. An assembly component, comprising: a pair of separate stepped terraces, horizontally separated from each other, having a vertical stack of steps in which a given step is offset from an adjacent step in a plane of the steps to define the pair of stepped terraces, wherein the steps in the pair of stepped terraces are configured to provide vertical reference positions that constrain vertical positions of an assembly tool during assembly of a ramp-stack chip package, wherein the assembly tool is mechanically coupled to a top surface of a given semiconductor die of a set of semiconductor dies in the ramp-stack chip package, and wherein a vertical position of the top surface of the given semiconductor die that references to the assembly component is constrained by the assembly tool.
地址 Redwood Shores CA US