发明名称 |
SRAM multiplexing apparatus |
摘要 |
An SRAM multiplexing apparatus comprise a plurality of local multiplexers and a global multiplexer. Each local multiplexer is coupled to a memory bank. The global multiplexer has a plurality of inputs, each of which is coupled to a corresponding output of the plurality of local multiplexers. In response to a decoded address in a read operation, an input of a local multiplexer is forwarded to a corresponding input of the global multiplexer. Similarly, the decoded address allows the global multiplexer to forward the input signal to a data out port via a buffer. |
申请公布号 |
US9208857(B2) |
申请公布日期 |
2015.12.08 |
申请号 |
US201414266457 |
申请日期 |
2014.04.30 |
申请人 |
Taiwan Semiconductor Manufacturing Company, Ltd. |
发明人 |
Chen Yi-Tzu;Hsieh Wei-jer;Lai Tsai-Hsin;Hsu Ling-Fang;Shieh Hau-Tai |
分类号 |
G11C7/10;G11C11/418;G11C11/413;G11C7/18 |
主分类号 |
G11C7/10 |
代理机构 |
Slater & Matsil, L.L.P. |
代理人 |
Slater & Matsil, L.L.P. |
主权项 |
1. A method comprising:
performing a first logic operation by a first sense amplifier, wherein the first sense amplifier has a first input coupled to a first bit line of a memory bank and a second input coupled to a second bit line of the memory bank; in response to a decoded address of a read operation, selecting an output of a first multiplexer, wherein the output of the first multiplexer is coupled to a second multiplexer and an input of the first multiplexer is coupled to the first sense amplifier; and in response to the decoded address, selecting, by the second multiplexer, an input from a plurality of inputs coupled to the second multiplexer. |
地址 |
Hsin-Chu TW |