Circuit devices and methods for re-clocking an input signal

摘要

Embodiments include circuit devices and methods for re-clocking an input signal. In an embodiment, a circuit device includes a data storage element having a data input to receive a digital data stream having a first clock rate and including a clock input to receive a clock signal having a second clock rate. The data storage element further includes logic to adjust edge timing of transitions within the digital data stream based on the clock signal to produce a modulated output signal having a power spectrum with spectral nulls at a desired frequency and its harmonics without changing an average data rate.

主权项

1. A method of re-clocking an input signal, the method comprising:
receiving a digital data stream having an average data rate corresponding to a first clock rate; receiving a clock signal having a second clock rate from a timing source; adjusting edge timing of transitions within the digital data stream based on a selected one of the clock signal and an inverted version of the clock signal in response to a control signal to produce an output signal re-clocked according to the selected one of the clock signal and the inverted version of the clock signal and having a power spectrum including a spectral null at a desired frequency without altering the average data rate; generating the control signal in response to transitions in the output signal; and altering the control signal based on the transitions in the output signal using a flip flop circuit having a clock input configured to receive the output signal, a data input, and a data output coupled to the data input through an inverter, the flip-flop circuit configured to toggle an output signal to produce the control signal.