发明名称 Global dielectric and barrier layer
摘要 Methods of fabricating a semiconductor device are described. The method includes forming a patterned oxide layer having a plurality of openings over a substrate, depositing a metal layer in the openings to form metal plugs, depositing a global transformable (GT) layer on the oxide layer and the metal plugs, and depositing a capping layer directly on the GT layer without exposing the GT layer to ambient air. The GT layer on the oxide layer transforms into a dielectric oxide and the GT layer on the metal plugs remains conductive during deposition of the capping layer.
申请公布号 US9209072(B2) 申请公布日期 2015.12.08
申请号 US201314063175 申请日期 2013.10.25
申请人 Taiwan Semiconductor Manufacturing Company, Ltd. 发明人 Lee Ya-Lien
分类号 H01L21/8238;H01L21/4763;H01L29/40;H01L29/43;H01L21/768 主分类号 H01L21/8238
代理机构 Haynes and Boone, LLP 代理人 Haynes and Boone, LLP
主权项 1. A method of fabricating a semiconductor device, the method comprising: forming an oxide layer having a plurality of openings over a substrate; depositing a metal layer in the openings to form metal plugs; depositing a global transformable (GT) layer having a uniform property on the oxide layer and the metal plugs; depositing a capping layer directly on the GT layer on the oxide layer and the metal plugs without exposing the GT layer to ambient air, wherein the depositing of the capping layer is configured to cause a first portion of the GT layer disposed over the oxide layer to have a higher resistance than a second portion of the GT layer disposed over one of the metal plugs and thereby electrically isolate the second portion; and depositing a conductor on the second portion of the GT layer.
地址 Hsin-Chu TW