Accumulation field effect microelectronic device and process for the formation thereof

摘要

A gated microelectronic device is provided that has a source with a source ohmic contact with the source characterized by a source dopant type and concentration. A drain with a drain ohmic contact with the drain characterized by a drain dopant type and concentration. An intermediate channel portion characterized by a channel portion dopant type and concentration. An insulative dielectric is in contact with the channel portion and overlaid in turn by a gate. A gate contact applies a gate voltage bias to control charge carrier accumulation and depletion in the underlying channel portion. This channel portion has a dimension normal to the gate which is fully depleted in the off-state. The dopant type is the same across the source, drain and the channel portion of the device. The device on-state current is determined by the doping and, unlike a MOSFET, is not directly proportional to device capacitance.

主权项

1. A gated microelectronic device comprising:
an insulator substrate; a source supported on said insulator substrate,
said source having a first metal contact defining a first ohmic contact interface with said source,said source having
a source dopant type anda source dopant concentration anddefining a source linear extent; a semiconducting drain supported on said insulator substrate,
said semiconducting drainhaving a second metal contact defining a second ohmic contact interface with said semiconducting drain,said semiconducting drain having
a drain dopant type anddrain dopant concentration anddefining a drain linear extent; a channel portion intermediate between said source and said semiconducting drain,
said channel portion supported on said insulator substrate and having
a channel portion dopant type andchannel portion dopant concentration anddefining a channel portion linear extent anda channel portion thickness,at least said channel portion being a semiconducting nanowire or a nanotube; an insulative dielectric in contact with said channel portion; a gate in overlying contact with said insulative dielectric, said gate defining a gate-insulative dielectric interface; said channel portion having a dimension normal to the gate-insulative dielectric interface suitable to fully deplete in an off-state; a gate contact applying a gate voltage bias to control charge carrier accumulation and depletion in said channel portion; and the source dopant, the drain dopant, and the channel portion dopant being all of a same type; and wherein
the first ohmic contact interface is noncontiguous with said channel portion andthe source linear extent, the drain linear extent, and the positioning of the first ohmic contact interface and the second ohmic contact interface prevent ambipolar behavior in the device.