发明名称 Three dimensional integrated circuits stacking approach
摘要 A semiconductor package and a method of forming a semiconductor package with one or more dies over an interposer die are provided. By forming a first redistribution structure over the interposer die with TSVs, the die(s) bonded to the interposer die can have edge(s) beyond the boundary of the interposer die. In addition, a second redistribution structure may be formed on the opposite surface of the interposer die from the redistribution structure. The second redistribution structure enables reconfiguration and fan-out of bonding structures for external connectors of the interposer die.
申请公布号 US9209156(B2) 申请公布日期 2015.12.08
申请号 US201213630149 申请日期 2012.09.28
申请人 Taiwan Semiconductor Manufacturing Co., Ltd. 发明人 Len Jing-Cheng;Hou Shang-Yun
分类号 H01L23/02;H01L23/00;H01L25/065;H01L23/31;H01L21/56;H01L21/683 主分类号 H01L23/02
代理机构 Eschweiler & Associates, LLC 代理人 Eschweiler & Associates, LLC
主权项 1. A semiconductor package, comprising: an interposer substrate with through substrate vias (TSVs); a first packaged die; a first redistribution structure over a first surface of the interposer substrate, wherein the first redistribution structure includes a first redistribution layer (RDL) to enable fan-out of the interposer substrate, and wherein the first packaged die is bonded to the first redistribution layer, and wherein an edge of the first packaged die is beyond a nearest edge of the interposer substrate; and a second packaged die bonded to the first redistribution structure, and a space between the second packaged die and the first redistribution structure is free of the first packaged die.
地址 Hsin-Chu TW