发明名称 CONTENT AWARE SCHEDULING IN A HEVC DECODER OPERATING ON A MULTI-CORE PROCESSOR PLATFORM
摘要 <p>A method is provided for decoding an encoded video stream on a processor having a plurality of processing cores includes receiving and examining a video stream to identify any macroscopic constructs present therein that support parallel processing. Decoding of the video stream is divided into a plurality of decoding functions. The plurality of decoding functions is scheduled for decoding the video stream in a dynamic manner based on availability of any macroscopic constructs that have been identified and then based on a number of bytes used to encode each block into which each picture of the video stream is partitioned. Each of the decoding functions is dispatched to the plurality of processing cores in accordance with the scheduling.</p>
申请公布号 WO2015184067(A1) 申请公布日期 2015.12.03
申请号 WO2015US32832 申请日期 2015.05.28
申请人 ARRIS ENTERPRISES, INC. 发明人 NELLORE, ANILKUMAR;PICHUMANI, PADMAGOWRI;KULKARNI, VINAY;GUBBI, CHETAN KUMAR VISWANATH;RAMAMURTHY, SHAILESH;CHANDRASHEKAR, PADMASSRI
分类号 H04N19/13;H04N19/17;H04N19/174;H04N19/186;H04N19/436;H04N19/44;H04N19/82 主分类号 H04N19/13
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