ELECTROSTATIC DISCHARGE PROTECTION SYSTEM

摘要

An integrated circuit includes a plurality of I/O cells, each including a portion of the first power bus, a portion of the second power bus, and an I/O pad coupled between the portions of the first and second power buses. A first set of the plurality of I/O cells is arranged along a die edge of the integrated circuit. A second set of the plurality of I/O cells is arranged along the die edge between the first set and the die edge. For each I/O cell in the first set, the portion of the first power bus is physically connected to the portion of the first power bus of an abutting I/O cell of the second set at a boundary between the I/O cell of the first set and the abutting I/O cell of the second set. The integrated circuit includes an ESD clamp and a trigger circuit.

主权项

1. An integrated circuit, comprising:
a first power bus; a second power bus; a plurality of I/O cells, each I/O cell including a portion of the first power bus, a portion of the second power bus, and an I/O pad coupled between the portion of the first power bus and the portion of the second power bus, wherein:
a first set of the plurality of I/O cells is arranged along a die edge of the integrated circuit,a second set of the plurality of I/O cells is arranged along the die edge between the first set and the die edge, andfor each I/O cell in the first set, the portion of the first power bus is physically connected to the portion of the first power bus of an abutting I/O cell of the second set at a boundary between the I/O cell of the first set and the abutting I/O cell of the second set; an ESD clamp coupled between the first and second power buses; and a trigger circuit coupled to the ESD clamp.