发明名称 INFORMATION PROCESSING APPARATUS, METHOD, AND STORAGE MEDIUM
摘要 In a layout design of a printed circuit board, more accurate bypass capacitor arrangement that has taken into consideration a wiring within a package of an IC is implemented. An information processing apparatus according to the present invention includes: a die pad specifying unit configured to specify a power source pad of a die and a ground pad of the die from design information on a printed circuit board; a bypass capacitor specifying unit configured to specify a bypass capacitor that is arranged on the printed circuit board from the design information; and a unit configured to derive an evaluation value for evaluating the arrangement of the specified bypass capacitor based on the design information, information on the specified power source pad of the die and ground pad of the die, and information on the specified bypass capacitor.
申请公布号 US2015347668(A1) 申请公布日期 2015.12.03
申请号 US201514722549 申请日期 2015.05.27
申请人 CANON KABUSHIKI KAISHA 发明人 Nojima Toshitaka;Sadamatsu Toshisato;Hama Shinichi
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
主权项 1. An information processing apparatus comprising: a die pad specifying unit configured to specify a power source pad of a die and a ground pad of the die from design information on a printed circuit board; a bypass capacitor specifying unit configured to specify a bypass capacitor arranged on the printed circuit board from the design information; and a unit configured to derive an evaluation value for evaluating arrangement of the specified bypass capacitor based on the design information, information on the specified power source pad of the die and ground pad of the die, and information on the specified bypass capacitor.
地址 Tokyo JP