| 发明名称 |
HIGH SPEED CURRENT MODE LATCH |
| 摘要 |
A current mode logic (CML) latch that includes a first transistor coupled to a second transistor, a third transistor coupled to a fourth transistor, a first capacitor connected to the first, second, third, and fourth transistors, and a second capacitor cross-coupled with the first capacitor and connected to the third and fourth transistors. The first and second transistors are configured to receive a data signal. The third and fourth transistors are configured to receive a clock signal. |
| 申请公布号 |
US2015349786(A1) |
申请公布日期 |
2015.12.03 |
| 申请号 |
US201514727990 |
申请日期 |
2015.06.02 |
| 申请人 |
TEXAS INSTRUMENTS INCORPORATED |
发明人 |
ERDOGAN Mustafa Ulvi |
| 分类号 |
H03L7/08;H04L7/00;H03L7/087 |
主分类号 |
H03L7/08 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A current mode logic (CML) latch, comprising:
a first transistor coupled to a second transistor, the first and second transistors configured to receive a data signal; a third transistor coupled to a fourth transistor, the third and fourth transistors configured to receive a clock signal, a first capacitor connected to the first, second, third, and fourth transistors; and a second capacitor cross-coupled with the first capacitor and connected to the third and fourth transistors such that parasitic capacitance in the CML latch is offset. |
| 地址 |
Dallas TX US |
