发明名称 PROTECTIVE VIA CAP FOR IMPROVED INTERCONNECT PERFORMANCE
摘要 Exemplary methods of forming a semiconductor structure may include etching a via through a semiconductor structure to expose a first circuit layer interconnect metal. The methods may include forming a layer of a material overlying the exposed first circuit layer interconnect metal. The methods may also include forming a barrier layer within the via having minimal coverage along the bottom of the via. The methods may additionally include forming a second circuit layer interconnect metal overlying the layer of material.
申请公布号 US2015348902(A1) 申请公布日期 2015.12.03
申请号 US201414291466 申请日期 2014.05.30
申请人 Applied Materials, Inc. 发明人 Naik Mehul;Ma Paul F.;Nemani Srinivas D.
分类号 H01L23/522;H01L21/768;H01L21/02;H01L21/306;H01L21/3065;H01L23/528;H01L23/532 主分类号 H01L23/522
代理机构 代理人
主权项 1. A method of forming a semiconductor structure comprising: etching a via through a semiconductor structure, wherein the etching exposes a first metal; forming a layer of material overlying the exposed first metal; depositing a barrier layer within the etched via, wherein the as-deposited barrier layer is characterized by a first thickness along the sidewalls of the via, and a second thickness less than the first thickness overlying the layer of material; and forming a second metal overlying the layer of material.
地址 Santa Clara CA US