Single-Exposure High Dynamic Range CMOS Image Sensor Pixel With Internal Charge Amplifier

摘要

A single-exposure high dynamic range (HDR) image sensor utilizes a charge amplifier having a selectively coupled conversion capacitor to read a single photodiode charge during a multi-phase readout operation. An overflow readout is performed during the photodiode charge integration phase, and utilizes the conversion capacitor to read overflow signals indicating rapidly rising photodiode charges caused by extreme exposure conditions, which also prevents saturation of the photodiode. At the end of the integration phase, the remaining photodiode charge is then measured using two readouts: a high sensitivity readout during which the storage capacitor de-coupled to accurately measure low-light conditions, and a low sensitivity readout during which the remaining photodiode charge is stored on the storage capacitor to provide normal light image data. Final single exposure HDR image data is then calculated by summing the overflow image data with the high-sensitivity and/or the low-sensitivity image data.

主权项

1. A CMOS image sensor comprising:
a plurality of pixels, wherein each pixel includes:
a photodiode;a transfer gate coupled between the photodiode and a first node;a charge amplifier coupled between the first node and a second node, the charge amplifier including:
a charge-to-voltage conversion capacitor having a first terminal connected to the second node; anda mode control switch connected between the first node and a second terminal of the conversion capacitor; and a control circuit configured to control the mode control switch and the transfer gate to measure a photodiode charge generated on the photodiode during a single integration/readout cycle such that:
during a first readout phase of the single integration/readout cycle, the mode control switch is actuated to operatively de-couple the conversion capacitor from the first node, and the transfer gate is actuated such that a first readout voltage is generated on the first node in accordance with the photodiode charge; andduring a second readout phase of the single integration/readout cycle, the mode control switch is actuated to operably couple the conversion capacitor to the first node, and the transfer gate is actuated, whereby a second readout voltage generated on the first node is at least partially stored on the conversion capacitor.