SEMICONDUCTOR DEVICE HAVING JUNCTIONLESS VERTICAL GATE TRANSISTOR AND METHOD OF MANUFACTURING THE SAME

摘要

A junctionless vertical gate transistor includes an active pillar vertically protruding from a substrate and including a first impurity region, a second impurity region and a third impurity region sequentially formed over the first impurity region; gate electrodes coupled to sidewalls of the second impurity region; and bit lines arranged in a direction of intersecting with the gate electrodes and each contacting the first impurity region. The first to the third impurity regions include impurities of the same polarity.

主权项

1. A method of manufacturing a semiconductor device, comprising:
forming a plurality of bit lines buried within a substrate and extending along a first direction; forming active pillars over the bit lines, each of the active pillars including a first impurity region contacting the bit line and second and third impurity regions sequentially formed on the first impurity region; and forming gate electrodes over sidewalls of the second impurity regions in a direction of crossing with the bit lines.