发明名称 Structure for Isolating High Speed Digital Signals in a High Density Grid Array
摘要 Due to size and cost, it becomes advantageous for integrated circuit (IC) manufacturers to use “single-ended” (one signal path per unique information path) high speed signals electrical contact pins (pins transmitting digital information that connect the integrated circuit to a printed circuit board) with a minimum number of surrounding powers and grounds. This lower cost method, however, creates electrical interference and coupling issues known as crosstalk between two adjacent signal paths in the via structure required to electrically connect the integrated circuit to the signal paths in the printed circuit board. Such crosstalk, in turn, increases jitter, degrades timing, and ultimately reduces the maximum operating speed of the circuit (performance). This disclosure presents a structure using micro-plating, micro-drilling and micro-machining methods that isolates adjacent signals by placing a metal barrier that shunts coupling currents to ground. The micro-drilling methods also reduce the length of adjacent signal paths in a specific signal routing and controlled depth drilling sequence.
申请公布号 US2015348901(A1) 申请公布日期 2015.12.03
申请号 US201514721263 申请日期 2015.05.26
申请人 Warwick Thomas P. 发明人 Warwick Thomas P.
分类号 H01L23/522;H01L21/768;H01L23/528 主分类号 H01L23/522
代理机构 代理人
主权项 1. A structure for electrically isolating high speed digital signals in a high density grid array, comprising: an electrically conductive barrier placed between two or more escape vias in a grid array to obtain isolation; said escape vias being connected to an integrated circuit of said grid array; said an electrically conductive barrier being connected to a ground or a supply of said integrated circuit to provide a shunt path for electro-magnetic energy associated with an electrically encoded unique information signal coming from or going toward each pin of said integrated circuit.
地址 Melbourne FL US