| 摘要 |
PROBLEM TO BE SOLVED: To provide an AD converter capable of reducing deviation of latch timing due to variation of power supply voltage, and to provide a solid-state imaging device.SOLUTION: A third voltage smaller than a first voltage but larger than a second voltage is applied, as a power supply voltage, to a plurality of latch units 95. When a capacitor C1 and a latch control signal line 96 are connected electrically, potential of the latch control signal line 96 reaches or goes above the third voltage. Only when electrical connection of the capacitor C1 and the latch control signal line 96 is released, the first voltage is applied to the capacitor C1, and the second voltage is applied to the latch control signal line 96. The plurality of latch units 95 latches a plurality of clock signals CK0-CK3, when the potential of the latch control signal line 96 reaches or goes above the third voltage. |
