DE-EMBEDDING AND CALIBRATION OF MIRROR SYMMETRIC RECIPROCAL NETWORKS

摘要

A method for characterization of fixture utilizes a mirror symmetric THRU structure and either a HALF-THRU with a LOAD shunted to ground or a THRU with a LOAD shunted to ground located at the mirror reference plane. The method extracts the short, open, and thru measurements from the THRU structure due to the mirror symmetry. The HALF-THRU with a LOAD or the THRU with a LOAD shunted to ground located at the mirror reference plane provides the independent measurement to fully characterize the fixture. The resultant impedance or scattering parameter HALF-THRU model may be used in de-embedding a Device-Under-Test, a calibration routine, or computational simulations. The parameters of a HALF-THRU model may be stored in a memory storage circuit affixed to the associated HALF-THRU fixture. Some embodiments may include at least one memory storage circuit that attaches to the HALF-THRU fixture body affixed to an interposing matable connector.

主权项

1. A method for characterizing ports of a test fixture including a pair of HALF-THRUS connected at a mirror reference plane and arranged to form a mirror symmetric THRU, the method comprising:
calculating, by at least one processor, amplitude and phase of a first parameter indicative of an input impedance with open output of one of the HALF-THRUS, z11, based on a second parameter indicative of an input impedance with open output of the mirror symmetric THRU, Z11, and a third parameter indicative of a forward transfer impedance with open output of the mirror symmetric THRU, Z21; calculating, by the at least one processor, an amplitude of a fourth parameter indicative of a reverse transfer impedance with open output of the one of the HALF-THRUS, z12, based on the second parameter indicative of the Z11 and the third parameter indicative of the Z21 and either of (i) a fifth parameter indicative of a reverse transfer impedance with open input of the one of the HALF-THRUS with a load shunted to ground at the mirror reference plane, zL12, or (ii) a sixth parameter indicative of a reverse transfer impedance with open input of the mirror symmetric THRU with a load shunted to ground at the mirror reference plane, ZL12; and calculating, by the at least one processor, an amplitude and phase of a seventh parameter indicative of an output impedance with open input of the one of the HALF-THRUS, z22, based on the third parameter indicative of the Z21 and the fourth parameter indicative of the z12; and outputting, by the at least one processor, the amplitude and phase of the first parameter indicative of the z11, the amplitude of the fourth parameter indicative of the z12, or the amplitude and phase of the seventh parameter indicative of the z22.