发明名称 EPITAXIAL WAFER FOR HETEROJUNCTION BIPOLAR TRANSISTOR AND HETEROJUNCTION BIPOLAR TRANSISTOR
摘要 Provided are a epitaxial wafer for a heterojunction bipolar transistor with which it is possible to further reduce turn-on voltage. Also provided is a heterojunction bipolar transistor. An epitaxial wafer for a heterojunction bipolar transistor (100) provided with a collector layer (103) comprising GaAs, a base layer (104) formed on the collector layer (103) and comprising InGaAs, and an emitter layer (105) formed on the base layer (104) and comprising InGaP; wherein, for the base layer (104), the In composition is reduced from the emitter layer (105) side towards the collector layer (103) side.
申请公布号 WO2015182592(A1) 申请公布日期 2015.12.03
申请号 WO2015JP65060 申请日期 2015.05.26
申请人 SCIOCS COMPANY LIMITED 发明人 FUJIO SHINJIRO;MEGURO TAKESHI
分类号 H01L21/331;H01L21/20;H01L29/737 主分类号 H01L21/331
代理机构 代理人
主权项
地址