DATA AND CLOCK SIGNAL VOLTAGES WITHIN AN INTEGRATED CIRCUIT

摘要

An integrated circuit 2 has data processing circuitry processing a data signal passing along a data path 14. Clocked circuitry coupled to the data processing circuitry serves to regulate passage of the data signal along the data path. The data signal is supplied at a data signal voltage amplitude and the clock signal is supplied at a different clock signal voltage amplitude. The clock signal voltage amplitude is higher than the data signal voltage amplitude. A separate clock signal power supply grid 12 is provided in addition to the data power supply grid 10.

主权项

1. An integrated circuit comprising:
data processing circuitry configured to process a data signal passing along a data path within said data processing circuitry; clocked circuitry coupled to said data processing circuitry and configured to regulate passage of said data signal along said data path under control of a clock signal; data power supply circuitry coupled to said data processing circuitry and configured to supply power to said data processing circuitry; and clock power supply circuitry coupled to said clocked circuitry and configured to supply power to said clocked circuitry; wherein said data power supply circuitry and said clock power supply circuitry are configured such that, at least when said data processing circuitry is actively processing said data signal passing along said data path, said data signal has a data signal voltage amplitude and said clock signal has a clock signal voltage amplitude that is different from said data signal voltage amplitude.