发明名称 |
FIN FIELD-EFFCT TRANSISTORS AND FABRICATION METHOD THEREOF |
摘要 |
A method for fabricating fin field-effect transistors includes providing a semiconductor substrate; and forming a plurality of fins on a surface of the semiconductor substrate. The method also includes forming dummy gates formed over side and top surfaces of the fins; forming a precursor material layer with a surface higher than top surfaces of the fins to cover the dummy gates and the semiconductor substrate; performing a thermal annealing process to convert the precursor material layer into a dielectric layer having a plurality of voids; and planarizing the dielectric layer to expose the top surfaces of the dummy gates. Further, the method also includes performing a post-treatment process using oxygen-contained de-ionized water on the planarized dielectric layer to eliminate the plurality of voids formed in the dielectric layer; removing the dummy gates to form trenches; and forming a high-K metal gate structure in each of the trenches. |
申请公布号 |
US2015348966(A1) |
申请公布日期 |
2015.12.03 |
申请号 |
US201514722671 |
申请日期 |
2015.05.27 |
申请人 |
Semiconductor Manufacturing International (Shanghai) Corporation |
发明人 |
ZHAO JIE;ZENG YIZHI |
分类号 |
H01L27/088;H01L29/66;H01L21/02;H01L29/51;H01L21/3213;H01L21/306;H01L29/49;H01L21/8234;H01L21/3105 |
主分类号 |
H01L27/088 |
代理机构 |
|
代理人 |
|
主权项 |
1. A method for fabricating fin-field effect transistors, comprising:
providing a semiconductor substrate; forming a plurality of fins on a surface of the semiconductor substrate; forming dummy gates over side and top surfaces of the fins; forming a precursor material layer to cover the dummy gates and the semiconductor substrate; performing a thermal annealing process on the precursor material layer to convert the precursor material layer into a dielectric layer having a plurality of voids; planarizing the dielectric layer with the plurality of voids to expose top surfaces of the dummy gates; performing a post-treatment process using oxygen-contained de-ionized water onto the planarized dielectric layer to eliminate the plurality of voids formed in the dielectric layer; removing the dummy gates to form trenches in the dielectric layer without voids; and forming a high-K metal gate structure in each of the trenches. |
地址 |
Shanghai CN |