| 发明名称 |
APPARATUS AND METHOD FOR CONTROLLING MEMORY |
| 摘要 |
An apparatus for controlling memory according to an embodiment of the present invention comprises: a secondary storage device configured to store page-level data; a memory configured to store page information; and a processor configured to perform swap-out to modify the page information and load access target data in an unassigned area of the memory when a page fault for the access target data of the data is caused and capacity of the memory to load the access target data is insufficient. |
| 申请公布号 |
US2015347042(A1) |
申请公布日期 |
2015.12.03 |
| 申请号 |
US201514693807 |
申请日期 |
2015.04.22 |
| 申请人 |
Electronics and Telecommunications Research Institute |
发明人 |
KIM Byoung-Seob;BAE Seung-Jo;CHOI Hyun-Hwa |
| 分类号 |
G06F3/06;G06F12/10 |
主分类号 |
G06F3/06 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. An apparatus for controlling memory comprising:
a secondary storage device configured to store page-level data; a memory configured to store page information; and a processor configured to perform swap-out to modify the page information and load access target data in an unassigned area of the memory when a page fault for the access target data of the data is caused and capacity of the memory to load the access target data is insufficient. |
| 地址 |
Daejeon KR |
