发明名称 |
METHODS AND APPARATUSES FOR DELAY-LOCKED LOOPS AND PHASE-LOCKED LOOPS |
摘要 |
A low power delay-locked loop (DLL) is presented. In one embodiment, the DLL includes a phase detector which includes a reference input and a feedback input to determine a phase difference. The DLL also includes a controller to determine whether to provide a signal to both the reference input and the feedback input such that the reference input and the feedback input receive an identical input, for example, during low power operation. |
申请公布号 |
EP2577669(A4) |
申请公布日期 |
2015.12.02 |
申请号 |
EP20110790247 |
申请日期 |
2011.05.27 |
申请人 |
INTEL CORPORATION |
发明人 |
MOSALIKANTI, PRAVEEN;KURD, NASSER A.;MOZAK, CHRISTOPHER P. |
分类号 |
G11C8/00;G06F1/32;G11C7/22;H03L7/081;H03L7/10;H03L7/14 |
主分类号 |
G11C8/00 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|