发明名称 |
Performing an operating frequency change using a dynamic clock control technique |
摘要 |
<p>In an embodiment, a processor includes a core to execute instructions, where the core includes a clock generation circuit to receive and distribute a first clock signal at a first operating frequency provided from a phase lock loop of the processor to a plurality of units of the core. The clock generation circuit may include a dynamic clock logic to receive a dynamic clock frequency command and to cause the clock generation circuit to distribute the first clock signal to at least one of the units at a second operating frequency. Other embodiments are described and claimed.</p> |
申请公布号 |
EP2879017(A3) |
申请公布日期 |
2015.12.02 |
申请号 |
EP20140192388 |
申请日期 |
2014.11.07 |
申请人 |
INTEL IP CORPORATION |
发明人 |
GENDLER, ALEXANDER;SODHI, INDER M. |
分类号 |
G06F1/08;G06F1/10;G06F1/32 |
主分类号 |
G06F1/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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