Semiconductor device including power-on reset circuit and operating method thereof

摘要

A semiconductor device includes a power-on reset circuit configured to receive a power voltage and generate a power-on reset signal varying with a voltage level of the power voltage, an internal circuit configured to be initialized and operated in response to the power-on reset signal and generate a hold signal based on an operation mode of the internal circuit, and a reset protection circuit configured to deactivate the power-on reset circuit in response to the hold signal and provide a replacement signal for replacing the power-on reset signal to the internal circuit when the power-on reset circuit is deactivated.

主权项

1. A method of operating a semiconductor memory device, the method comprising:
generating a power-on reset signal varying with a voltage level of a power voltage; providing the power-on reset signal to an internal circuit of the semiconductor memory device; performing an initializing operation of the internal circuit in response to the power-on reset signal; receiving a chip enable signal for selecting the semiconductor memory device from an external device to the internal circuit; entering a sleep mode of the internal circuit when the chip enable signal maintains a disable state for a predetermined time; generating a hold signal to be enabled when the internal circuit is in the sleep mode; deactivating a power-on reset circuit of the semiconductor memory device in response to the hold signal; and providing a replacement signal for replacing the power-on reset signal to the internal circuit when the power-on reset circuit is deactivated.