发明名称 Exception handling in a data processing apparatus having a secure domain and a less secure domain
摘要 A data processing apparatus and method are provided for handling exceptions, including processing circuitry configured to perform data processing operations in response to program code, said circuitry including exception control circuitry. A plurality of registers are provided including a first and second subsets of registers, and a data store. The data store includes a secure region and a less secure region, wherein the secure region is for storing data accessible by the processing circuitry when operating in a secure domain and not accessible by the processing circuitry when operating in a less secure domain. The exception control circuitry performs state saving of data from the first subset of registers before triggering the processing circuitry to perform an exception handling routine corresponding to the exception. Where background processing was performed by the processing circuitry in the secure domain, the exception control circuitry performs additional state saving of the data.
申请公布号 US9202071(B2) 申请公布日期 2015.12.01
申请号 US201313741709 申请日期 2013.01.15
申请人 ARM Limited 发明人 Grocutt Thomas Christopher;Grisenthwaite Richard Roy
分类号 G06F21/00;G06F21/60;G06F21/52;G06F21/74;G06F9/30 主分类号 G06F21/00
代理机构 Nixon & Vanderhye P.C. 代理人 Nixon & Vanderhye P.C.
主权项 1. A data processing apparatus comprising: processing circuitry configured to perform data processing operations in response to program code, the processing circuitry comprising exception control circuitry for controlling exception processing; a data store configured to store data, the data store comprising a plurality of regions including a secure region and a less secure region, wherein the secure region is for storing data which is accessible by the processing circuitry when operating in a secure domain and not accessible by the processing circuitry when operating in a less secure domain; and a plurality of registers configured to store data, the registers including a first subset of registers and a second subset of registers, the registers being accessible to said program code executing on the processing circuitry, wherein, in response to an exception, state saving of data from the registers to the data store is required in order to allow later restoring of that data to the registers when the exception has been handled; wherein: in response to an initial exception from background processing performed by the processing circuitry, the exception control circuitry is configured to perform state saving of data from the first subset of registers to the data store before triggering the processing circuitry to perform an exception handling routine corresponding to the exception, wherein the exception handling routine has responsibility for performing state saving of data from the second subset of registers to the data store; and in response to a first exception causing a transition from the secure domain to the less secure domain, where the background processing was performed by the processing circuitry in the secure domain, the exception control circuitry is configured to perform additional state saving of the data from the second subset of registers to the data store before triggering the processing circuitry to perform the exception handling routine in the less secure domain.
地址 Cambridge GB