发明名称 Behavioral synthesis apparatus, behavioral synthesis method, data processing system including behavioral synthesis apparatus, and non-transitory computer readable medium storing behavioral synthesis program
摘要 A behavioral synthesis apparatus includes a determination unit that determines whether or not a loop description should be converted into a pipeline, and a synthesis unit that performs behavioral synthesis while setting a stricter delay constraint for a loop description that is converted into a pipeline than a loop description that is not converted into a pipeline.
申请公布号 US9201996(B2) 申请公布日期 2015.12.01
申请号 US201313922945 申请日期 2013.06.20
申请人 Renesas Electronics Corporation 发明人 Toi Takao;Fujii Taro;Nakamura Noritsugu
分类号 G06F17/50 主分类号 G06F17/50
代理机构 Sughrue Mion, PLLC 代理人 Sughrue Mion, PLLC
主权项 1. A behavioral synthesis apparatus comprising: a determination unit that determines whether or not a loop description should be converted into a pipeline; and a synthesis unit that performs behavioral synthesis while setting shorter delay constraint for a loop description that is converted into a pipeline than a loop description that is not converted into a pipeline, wherein the synthesis unit is configured to read constraint information for performing the behavioral synthesis, the constraint information including a first delay constraint for a pipeline circuit and a second delay constraint for a circuit other than the pipeline circuit, and the first delay constraint is shorter than the second delay constraint, wherein the synthesis unit reads the first delay constraint for the loop description that is converted into a pipeline and the second delay constraint the loop description that is not converted into the pipeline.
地址 Kanagawa JP