发明名称 Quadrature lattice matching network
摘要 Embodiments include but are not limited to apparatuses and systems including a quadrature lattice matching network including first path having a series inductor and a shunt inductor, and a second path having a series capacitor and a shunt capacitor. Other embodiments may be described and claimed.
申请公布号 US9203362(B2) 申请公布日期 2015.12.01
申请号 US201414338262 申请日期 2014.07.22
申请人 TriQuint Semiconductor, Inc. 发明人 Wright Peter V.
分类号 H04L25/03;H04B1/04;H03F3/68;H03F3/24;H03F1/56;H03F3/21;H03H7/38;H03F3/19 主分类号 H04L25/03
代理机构 Withrow & Terranova, P.L.L.C. 代理人 Withrow & Terranova, P.L.L.C.
主权项 1. An apparatus comprising: a first power amplifier having a first output for providing a first signal; a second power amplifier having a second output for providing a second signal; and a quadrature lattice matching network including a first path coupled with the first output of the first power amplifier and having a series inductor and a shunt inductor that substantially provide a positive forty-five degree phase shift to the first signal, and a second path coupled with the second output of the second power amplifier and having a series capacitor and a shunt capacitor that substantially provide a negative forty-five degree phase shift to the second signal, wherein the first power amplifier is configured to operate with a phase difference of approximately ninety degrees with respect to the second power amplifier.
地址 Hillsboro OR US
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