发明名称 |
Semiconductor package including stacked chips and a redistribution layer (RDL) structure |
摘要 |
A semiconductor package offers improved product reliability by supplying a power voltage and a ground voltage to a semiconductor chip in a secured manner using a redistribution layer (RDL) structure. The semiconductor package includes a first semiconductor chip disposed on a substrate, a second semiconductor chip disposed on the first semiconductor chip, a plurality of redistribution lines disposed on the first semiconductor chip and electrically connecting the first semiconductor chip to the second semiconductor chip, and a redistribution wire disposed on the first semiconductor chip and electrically connecting one of the redistribution lines to another. |
申请公布号 |
US9202796(B2) |
申请公布日期 |
2015.12.01 |
申请号 |
US201313798444 |
申请日期 |
2013.03.13 |
申请人 |
Samsung Electronics Co., Ltd. |
发明人 |
Park Ji-Woon |
分类号 |
H01L23/02;H01L23/00;H01L25/065 |
主分类号 |
H01L23/02 |
代理机构 |
Volentine & Whitt, PLLC |
代理人 |
Volentine & Whitt, PLLC |
主权项 |
1. A semiconductor package comprising:
at least one first semiconductor chip disposed on a substrate; a second semiconductor chip disposed on the at least one first semiconductor chip; redistribution lines extending on the at least one first semiconductor chip and providing conductive paths, respectively, each of which paths electrically connects the first semiconductor chip to the second semiconductor chip independently of the other; and at least one redistribution wire disposed on the at least one first semiconductor chip and electrically connecting a plurality of the redistribution lines to one another. |
地址 |
Suwon-si, Gyeonggi-do KR |