Techniques for detecting broken word lines in non-volatile memories

摘要

Techniques for determining broken word lines in non-volatile memory arrays are presented, which are particularly applicable to 3D NAND memory, such as that of the BiCS type. One set of techniques uses test program operation that alternates a standard staircase waveform with an elongated verify operation. This allows for a more accurate verify of under-programmed broken word lines relative to the standard verify operation. Another set of techniques looks at the ramp rate along the interconnect between the word line decoding circuitry and the main part of the word line. These techniques can also be used for determining defective select gate lines of an array with a NAND type structure.

主权项

1. A method of operating a non-volatile memory circuit having an array including a plurality control lines each connected to the control gates of a plurality of transistors having programmable threshold voltages, wherein the threshold voltages of said programmable transistors along a corresponding associated control line are programmed by a standard programming operation including a series of programming pulses applied to the associated control line and alternating with subsequent verify operations, the programmable transistors along the associated control line locking out from further programming pulses as verified, the method comprising:
determining whether a first control line is defective by a process including:
performing a test program operation on a first plurality of the programmable transistors connected along the first control line, the test program operation including a series of alternating programming pulses applied to the first control line and subsequent verify operations, the first plurality of programmable transistors locking out from further programming pulses as verified,wherein the test program operation uses verify operations of a longer duration than the verify operation of a standard programming operation; andbased on the number programming pulses in the test program operation, determining whether the first control line is defective.