| 发明名称 | Timebase peripheral | ||
| 摘要 | A microcontroller has a programmable timebase, wherein the timebase has a trigger input to start a timer or counter of the timebase and wherein the timebase can be configured to operate upon receiving a trigger signal in a first mode to generate a plurality of timer/counter event signals until a reset bit in a control register is set and in a second mode to generate a single timer/counter event signal and wherein the timebase can be configured to operate in a third mode to generate a predefined number of timer/counter event signals, wherein the predefined number is defined by a plurality of bits of a register. | ||
| 申请公布号 | US9201446(B2) | 申请公布日期 | 2015.12.01 |
| 申请号 | US201313753341 | 申请日期 | 2013.01.29 |
| 申请人 | MICROCHIP TECHNOLOGY INCORPORATED | 发明人 | Bowling Stephen;Bartling James |
| 分类号 | G06F1/06;G06F1/04;G06F1/14 | 主分类号 | G06F1/06 |
| 代理机构 | Slayden Grubert Beard PLLC | 代理人 | Slayden Grubert Beard PLLC |
| 主权项 | 1. A microcontroller comprising a programmable timebase, wherein the timebase comprises a trigger input to start a timer or counter of the timebase and wherein the timebase can be configured to operate in a first mode to generate a plurality of timer/counter event signals until a reset bit in a control register is set and in a second mode to generate a single timer/counter event signal and in a third mode to generate a predefined number of timer/counter event signals, wherein the predefined number is defined by a plurality of bits of a register and wherein the first mode is set by setting a first mode bit and the second mode or the third mode are set by setting a second mode plurality of bits, wherein the control register is a first control register and the plurality of bits are bits of a second control register associated with the timebase. | ||
| 地址 | Chandler AZ US | ||