| 摘要 |
PURPOSE:To reduce the leakage current, by connecting a transistor (TR) and a load resistance in parallel between a load element of a memory cell and an electric power supply and securing a conductive state and a nonconductive state in an active mode and in a stand-by mode of the TR, respectively. CONSTITUTION:In addition to a static memory cell circuit a transistor TR3 and a load resistance RS are connected in parallel between a power supply VDD and resistances R and R'. The control signal which is supplied to the TR3 is set at levels ''0'' and ''1'' in active mode and a stand-by mode, respectively. Thus the TR3 conducts and the circuit works in the active mode, and the TR3 becomes nonconductive in the stand-by mode. Then the power is supplied to a memory cell from the VDD via the resistance RS. As a result, the leakage current is reduced. |
