Estimation of digital-to-analog converter static mismatch errors

摘要

Digital-to-analog converters (DACs) are used widely in electronics. The DACs are usually not ideal and typically exhibits errors, e.g., static mismatch errors. This disclosure describes a digital calibration technique for DAC static mismatch in continuous-time delta-sigma modulators (CTDSMs). The methodology utilizes the DAC unit elements (UEs) themselves to measure each other's mismatch. There are no extra circuitries except for the logic design inside DAC drivers or comparators. The methodology is an attractive calibration technique for high performance CTDSMs, especially for high speed system in multi-gigahertz range with low over-sampling rate (OSR).

主权项

1. A method for estimating static mismatch errors of a digital-to-analog converter (DAC) comprising of a plurality of unit elements (UEs), each unit element configured for generating currents having complementary values, and the DAC provides feedback for an analog-to-digital converter (ADC), the method comprises:
forcing a first UE of the UEs to output an opposite value of a default value of the first UE; storing a first output value of the ADC while the first UE is forced to output the opposite value of the default value of the first UE; forcing a second UE of the UEs to output an opposite value of a default value of the second UE; storing a second output value of the ADC while the second UE is forced to output the opposite value of the default value of the second UE; and determining a first relative error between the first UE and the second UE based on the first output value and the second output value.