| 发明名称 | Memory element and memory device | ||
| 摘要 | A memory element with a first electrode, a memory layer, and a second electrode in this order. The memory layer includes a resistance change layer provided on the first electrode side, an ion source layer provided on the second electrode side, an intermediate layer provided between the resistance change layer and the ion source layer, and a barrier layer provided at least either between the ion source layer and the intermediate layer, or between the intermediate layer and the resistance change layer. | ||
| 申请公布号 | US9203018(B2) | 申请公布日期 | 2015.12.01 |
| 申请号 | US201414196240 | 申请日期 | 2014.03.04 |
| 申请人 | SONY CORPORATION | 发明人 | Ohba Kazuhiro;Sone Takeyuki;Shimuta Masayuki;Yasuda Shuichiro |
| 分类号 | G11C11/00;H01L45/00;H01L27/24;G11C13/00;G11C16/04;G11C16/34 | 主分类号 | G11C11/00 |
| 代理机构 | Dentons US LLP | 代理人 | Dentons US LLP |
| 主权项 | 1. A memory element, comprising: a first electrode, a memory layer, and a second electrode in this order, wherein, the memory layer includes (a) a resistance change layer on the first electrode, (b) an ion source layer, (c) an intermediate layer between the resistance change layer and the ion source layer, and (d) a barrier layer between the ion source layer and the intermediate layer or between the intermediate layer and the resistance change layer, the barrier layer having a surface in contact with the intermediate layer. | ||
| 地址 | Tokyo JP | ||