发明名称 METHOD AND SYSTEM FOR PLANAR REGROWTH IN GAN ELECTRONIC DEVICES
摘要 A vertical JFET includes a III-nitride substrate and a III-nitride epitaxial layer of a first conductivity type coupled to the III-nitride substrate. The first III-nitride epitaxial layer has a first dopant concentration. The vertical JFET also includes a III-nitride epitaxial structure coupled to the first III-nitride epitaxial layer. The III-nitride epitaxial structure includes a set of channels of the first conductivity type and having a second dopant concentration, a set of sources of the first conductivity type, having a third dopant concentration greater than the first dopant concentration, and each characterized by a contact surface, and a set of regrown gates interspersed between the set of channels. An upper surface of the set of regrown gates is substantially coplanar with the contact surfaces of the set of sources.
申请公布号 US2015340476(A1) 申请公布日期 2015.11.26
申请号 US201514815780 申请日期 2015.07.31
申请人 AVOGY, INC. 发明人 Kizilyalli Isik C.;Romano Linda;Bour David P.
分类号 H01L29/66;H01L29/808;H01L29/78 主分类号 H01L29/66
代理机构 代理人
主权项 1. A vertical JFET comprising: a III-nitride substrate; and a III-nitride epitaxial structure coupled to the III-nitride substrate, wherein the III-nitride epitaxial structure comprises: a plurality of channels of a first conductivity type, wherein each of the channels comprises an interface surface,a plurality of sources of the first conductivity type, wherein each of the sources comprises a contact surface contacting an interface surface of the channels, anda plurality of epitaxially grown gates interleaved with the channels, wherein an upper surface of the gates is substantially coplanar with the contact surfaces of the sources.
地址 San Jose CA US