HIGH DENSITY MOSFET ARRAY WITH SELF-ALIGNED CONTACTS DELIMITED BY NITRIDE-CAPPED TRENCH GATE STACKS AND METHOD

摘要

A high density trench-gated MOSFET array and method are disclosed. It comprises semiconductor substrate partitioned into MOSFET array area and gate pickup area; epitaxial region, body region and source region; numerous precisely spaced active nitride-capped trench gate stacks (ANCTGS) embedded till the epitaxial region. Each ANCTGS comprises a stack of polysilicon trench gate with gate oxide shell and silicon nitride cap covering top of polysilicon trench gate and laterally registered to gate oxide shell. The ANCTGS forms, together with the source, body, epitaxial region, a MOSFET device in the MOSFET array area. Over MOSFET array area and gate pickup area, a patterned dielectric region atop the MOSFET array and a patterned metal layer atop the patterned dielectric region. Thus, the patterned metal layer forms, with the MOSFET array and the gate pickup area, self-aligned source and body contacts through the inter-ANCTGS separations.

主权项

1. A high density trench-gated MOSFET array comprising:
a semiconductor substrate; an epitaxial region overlaying the semiconductor substrate, a body region overlying the epitaxial region and a source region overlying the body region; an array of active nitride-capped trench gate stacks (ANCTGS), with predetermined inter-ANCTGS separations, disposed above the semiconductor substrate and embedded vertically into the source region, the body region and the epitaxial region wherein each ANCTGS comprises a stack of a polysilicon trench gate embedded in a gate oxide shell and a silicon nitride cap covering a top of the polysilicon trench gate and laterally extending-over edges of the gate oxide shell whereby forming, together with the source region, the body region and the epitaxial region, a MOSFET device of a corresponding MOSFET array in a MOSFET array area; and over the MOSFET array area, a patterned dielectric region atop the MOSFET array and a patterned metal layer atop the patterned dielectric region whereby the patterned metal layer forms, with the MOSFET array, a plurality of self-aligned source and body contacts through the inter-ANCTGS separations.