发明名称 |
MEMORY CONTROLLERS EMPLOYING MEMORY CAPACITY COMPRESSION, AND RELATED PROCESSOR-BASED SYSTEMS AND METHODS |
摘要 |
Aspects disclosed herein include memory controllers employing memory capacity compression, and related processor-based systems and methods. In certain aspects, compressed memory controllers are employed that can provide memory capacity compression. In some aspects, a line-based memory capacity compression scheme can be employed where additional translation of a physical address (PA) to a physical buffer address is performed to allow compressed data in a system memory at the physical buffer address for efficient compressed data storage. A translation lookaside buffer (TLB) may also be employed to store TLB entries comprising PA tags corresponding to a physical buffer address in the system memory to more efficiently perform the translation of the PA to the physical buffer address in the system memory. In certain aspects, a line-based memory capacity compression scheme, a page-based memory capacity compression scheme, or a hybrid line-page-based memory capacity compression scheme can be employed. |
申请公布号 |
WO2015179483(A1) |
申请公布日期 |
2015.11.26 |
申请号 |
WO2015US31717 |
申请日期 |
2015.05.20 |
申请人 |
QUALCOMM INCORPORATED |
发明人 |
HEDDES, MATTHEUS, CORNELIS ANTONIUS ADRIANUS;VAIDHYANATHAN, NATARAJAN;VERRILLI, COLIN, BEATON |
分类号 |
G06F12/02 |
主分类号 |
G06F12/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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