发明名称 |
INTERCONNECT STRUCTURE AND METHODS OF MAKING SAME |
摘要 |
A method of manufacturing a semiconductor interconnect structure may include forming a low-k dielectric layer over a substrate and forming an opening in the low-k dielectric layer, where the opening exposes a portion of the substrate. The method may also include filling the opening with a copper alloy and forming a copper-containing layer over the copper alloy and the low-k dielectric layer. An etch rate of the copper-containing layer may be greater than an etch rate of the copper alloy. The method may additionally include patterning the copper-containing layer to form interconnect features over the low-k dielectric layer and the copper alloy. |
申请公布号 |
US2015340283(A1) |
申请公布日期 |
2015.11.26 |
申请号 |
US201514819099 |
申请日期 |
2015.08.05 |
申请人 |
Taiwan Semiconductor Manufacturing Company, Ltd. |
发明人 |
Huang Tsung-Min;Lee Chung-Ju;Tsai Tsung-Jung |
分类号 |
H01L21/768;H01L21/3213;H01L21/324;H01L23/532 |
主分类号 |
H01L21/768 |
代理机构 |
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代理人 |
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主权项 |
1. A method of manufacturing a semiconductor interconnect structure, the method comprising:
forming a low-k dielectric layer over a substrate; forming an opening in the low-k dielectric layer, the opening exposing a portion of the substrate; filling the opening with a copper alloy; forming a copper-containing layer over the copper alloy and the low-k dielectric layer, wherein an etch rate of the copper-containing layer is greater than an etch rate of the copper alloy; and patterning the copper-containing layer to form interconnect features over the low-k dielectric layer and the copper alloy. |
地址 |
Hsin-Chu TW |