发明名称 INTEGRATED CIRCUIT HIERARCHICAL DESIGN TOOL APPARATUS AND METHOD OF HIERARCHICALLY DESIGNING AN INTEGRATED CIRCUIT
摘要 An integrated circuit hierarchical design tool apparatus comprises a processor arranged to support a block coupling reconfiguration unit. The block coupling reconfiguration unit is capable of receiving block layout data comprising block placement, terminal location data and intra-block connectivity data. The block coupling reconfiguration unit is arranged to identify from the block layout data a block placement level block having a terminal respectively coupled to a plurality of other block placement level blocks by a plurality of nets, and to provide the block with an additional terminal capable of providing the same function as the terminal. The block coupling reconfiguration unit is also arranged to replace a net of the plurality of nets that is coupled to the terminal with a replacement net coupled to the additional terminal.
申请公布号 US2015339427(A1) 申请公布日期 2015.11.26
申请号 US201314758967 申请日期 2013.01.07
申请人 BERKOVITZ Asher;BEN-PORAT Inbar;NEEMAN Yossy 发明人 BERKOVITZ ASHER;BEN-PORAT INBAR;NEEMAN YOSSY
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
主权项 1. An integrated circuit hierarchical design tool apparatus, the apparatus comprising: a block coupling reconfiguration unit capable of receiving block layout data comprising block placement, terminal location data and intra-block connectivity data; wherein the block coupling reconfiguration unit is arranged to identify from the block layout data a block placement level block having a terminal respectively coupled to a plurality of other block placement level blocks by a plurality of nets,provide the block with an additional terminal capable of providing the same function as the terminal,to replace a net of the plurality of nets that is coupled to the terminal with a replacement net coupled to the additional terminal.
地址 Kiryat Ono IL