发明名称 |
INTEGRATED CIRCUITS WITH LATERALLY DIFFUSED METAL OXIDE SEMICONDUCTOR STRUCTURES AND METHODS FOR FABRICATING THE SAME |
摘要 |
Integrated circuits with improved laterally diffused metal oxide semiconductor (LDMOS) structures, and methods of fabricating the same, are provided. An exemplary LDMOS integrated circuit includes a p-type semiconductor substrate, an n-type epitaxial layer disposed over and in contact with the p-type semiconductor substrate, and a p-type implant layer disposed within the n-type epitaxial layer, wherein the p-type implant layer is not in contact with the p-type semiconductor substrate. It further includes an n-type reduced surface field region disposed over and in contact with the p-type implant layer, a p-type body well disposed on a lateral side of the p-type implant layer and the n-type reduced surface field region, and a shallow trench isolation (STI) structure disposed within the n-type reduced surface field region. Still further, it includes a gate structure disposed partially over the p-type body well, partially over the n-type surface field region, and partially over the STI structure. |
申请公布号 |
US2015340428(A1) |
申请公布日期 |
2015.11.26 |
申请号 |
US201414285774 |
申请日期 |
2014.05.23 |
申请人 |
GLOBALFOUNDRIES Singapore Pte. Ltd. |
发明人 |
Lu Yi;Verma Purakh Raj;Wang Dongli;Chen Deyan |
分类号 |
H01L29/06;H01L29/10;H01L29/66;H01L29/78 |
主分类号 |
H01L29/06 |
代理机构 |
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代理人 |
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主权项 |
1. A laterally diffused metal oxide semiconductor (LDMOS) integrated circuit structure comprising:
a p-type semiconductor substrate; an n-type epitaxial layer disposed over and in contact with the p-type semiconductor substrate; a p-type implant layer disposed within the n-type epitaxial layer, wherein the p-type implant layer is not in contact with the p-type semiconductor substrate; an n-type reduced surface field region disposed over and in contact with the p-type implant layer; a p-type body well disposed on a lateral side of the p-type implant layer and the n-type reduced surface field region; a shallow trench isolation structure disposed within the n-type reduced surface field region; and a gate structure disposed partially over the p-type body well, partially over the n-type surface field region, and partially over the shallow trench isolation structure. |
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