| 摘要 |
PURPOSE:To devise hardware and thus eliminate restrictions of software development in setting necessary addresses, by permitting a CPU to start at an optional execution starting address in a memory when powered up. CONSTITUTION:Dip switches 83-86 have set hexadecimal values respectively. Then, low-order one-byte data on a jump destination address are set to the dip switches 83 and 84. Further, the high-order one-byte data on the jump destination address are set to the switches 85 and 86 respectively. The both are used in combination to set an optional two-byte address. Therefore, when the power source is turned on, this address is set in the program counter in a CPU1. Then, NAND gates 91-93 operate successively and the CPU1 reads three-byte data successively through tristate buffers 71-73. A flip-flop 2 is reset by the output Q4 of a decoder 5 and an NAND gate 6 is opened to send a data read-in signal RD to the memory as it is. Then, the CPU1 operates normally. |
