Memory cell array in a nonvolatile memory

摘要

A memory cell array in a nonvolatile memory is disclosed comprising island semiconductor layers (101) on a substrate (1), wherein the lower parts of the island semiconductor layers (101) serve as source lines (2; SLx) for the memory cells and transistors arranged in a column; a tunnel insulation film (102) on the island semiconductor layers (101); charge accumulation layers (6) on the sidewalls of the island semiconductor layers (101); an insulating film (104) on the charge accumulation layers (6); control gates (7) of the memory cells and read lines (11) of transistors arranged in a row on the insulating film (104); and common source lines (12; CSL) for the transistors arranged in a row and first bit line parts (13) for the memory cells, and second bit line parts (15) for the memory cells, wherein the first and second bit line parts (13, 15) for the memory cells are laid out in columns and the common source lines (12; CSL) for the transistors are laid out in rows.