发明名称 Dynamic data dimensioning by partial reconfiguration of single or multiple field-programmable gate arrays using bootstraps
摘要 An approach is presented for managing resources of a field-programmable gate array (FPGA). At runtime, first data is extracted and processed. At runtime and via a very high speed integrated circuit hardware description language (VHDL) interface, a change in a size, a structure, or a load schedule of next data is received. The change is determined by a quantitative method analyzing the first data and executing external to the FPGA. At runtime, a first bootstrap code in the FPGA executes, and in response, other bootstrap codes in the FPGA are updated. The first bootstrap code is configured to update the structure of the next data. The other bootstrap codes are configured to extract and process, and to determine an order of processing and a configuration of the next data. The next data is extracted and processed based on the updated other bootstrap codes.
申请公布号 US9195470(B2) 申请公布日期 2015.11.24
申请号 US201313947250 申请日期 2013.07.22
申请人 GLOBALFOUNDRIES INC. 发明人 Adiki Sreenivas;Kanamatareddy Ravi Kumar Reddy;Satapathy Siba P.
分类号 G06F9/00;G06F9/44;G06F9/445;G06F17/50 主分类号 G06F9/00
代理机构 Schmesier, Olsen & Watts 代理人 Schmesier, Olsen & Watts
主权项 1. A method of managing resources of a field-programmable gate array (FPGA), the method comprising the steps of: a computer at a runtime extracting and processing a first set of data; via a very high speed integrated circuit hardware description language (VHDL) interface, the computer at the runtime receiving a change in a size of a next set of data to be processed, a structure of the next set of data to be processed, or a load schedule of the next set of data to be processed, the change determined by a quantitative method analyzing the first set of data, the quantitative method executing external to the FPGA; based on the received change, the computer at the runtime executing a first bootstrap code in the FPGA; in response to the step of executing the first bootstrap code and based on the received change, the computer at the runtime updating at least one bootstrap code included in a plurality of other bootstrap codes in the FPGA, the first bootstrap code configured to dimension the next set of data, the plurality of other bootstrap codes including a second bootstrap code configured to extract the next set of data from a data source, a third bootstrap code configured to process the next set of data extracted by the second bootstrap code, a fourth bootstrap code configured to determine an order in which the next set of data is processed by the third bootstrap code, and a fifth bootstrap code configured to determine a configuration of the next set of data; and based on the received change and the updated at least one bootstrap code, the computer extracting and subsequently processing the next set of data.
地址 Grand Cayman KY