发明名称 Systems and methods for improved data management in data storage systems
摘要 A controller-bridge architecture in which a bridge device coupled with the non-volatile memory (NVM) handles inline read-modify-write function under instructions from a controller device is disclosed. In some embodiments, instead of transferring an entire range of data (e.g., a whole NVM page) across a bus between the bridge and the controller twice (once before and once after modification), only the modification data is sent by the controller to the bridge across the bus. The bridge in some embodiments also handles error correction and/or RAID parity striping in the read-modify-write process.
申请公布号 US9195530(B1) 申请公布日期 2015.11.24
申请号 US201113226437 申请日期 2011.09.06
申请人 Western Digital Technologies, Inc. 发明人 Jean Sebastien A.
分类号 G06F11/00;G06F11/07;G06F11/16;G06F13/40 主分类号 G06F11/00
代理机构 代理人
主权项 1. A method for reducing data latency for a read-modify-write operation in a controller architecture comprising a controller device and a bridge device coupled with non-volatile solid-state memory storage, the method comprising performing by the bridge device: in response to receiving, from the controller device, a first command comprising modification data and a first location of parity data in the non-volatile memory storage and a second command instructing the bridge device to accumulate parity data in connection with processing the first command: reading data from the non-volatile memory storage, wherein reading the data comprises performing error correction in response to detecting an error in the data;modifying the read data with the modification data to generate modified data;creating updated parity data based at least in part on the modification data and parity data stored at least partially in the first location, wherein creating the updated parity data is performed by the bridge device without transferring the parity data and the updated parity data to the controller device;writing the modified data to the non-volatile memory storage; andwriting the updated parity data to the non-volatile memory storage without receiving an additional command from the controller device, the additional command directing the bridge device to write the updated parity data,whereby latency is reduced due to performance of the read-modify-write operation without transfer of the read data from the bridge device to the controller device.
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