发明名称 |
Flash memory structure and method for forming the same |
摘要 |
Embodiments of mechanisms of a semiconductor device structure are provided. The semiconductor device structure includes a substrate and a word line cell disposed over the substrate. The semiconductor device structure includes a substrate and a control gate formed over the substrate. The semiconductor device further includes an insulating layer formed on a sidewall of the control gate and a memory gate formed adjacent to the insulating layer. In addition, the insulating layer has a first height, and the memory gate has a second height shorter than the first height. |
申请公布号 |
US9196750(B2) |
申请公布日期 |
2015.11.24 |
申请号 |
US201314093269 |
申请日期 |
2013.11.29 |
申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. |
发明人 |
Tsai Chun-Tse;Lai Chia-Ping |
分类号 |
H01L21/336;H01L29/792;H01L29/66;H01L21/28;H01L29/423 |
主分类号 |
H01L21/336 |
代理机构 |
Birch, Stewart, Kolasch & Birch, LLP |
代理人 |
Birch, Stewart, Kolasch & Birch, LLP |
主权项 |
1. A semiconductor device structure, comprising:
a substrate; a control gate formed over the substrate, wherein the control gate comprises a first silicide layer; an insulating layer formed on a sidewall of the control gate; and a memory gate formed adjacent to the insulating layer, wherein the memory gate comprises a second silicide layer; wherein the insulating layer has a first height, and the memory gate has a second height shorter than the first height, and wherein a distance between a bottom surface of the first silicide layer and a top surface of the second silicide layer is in a range from about 10 nm to about 200 nm. |
地址 |
Hsin-Chu TW |