发明名称 Stored data analysis
摘要 A system comprises a hashing logic, which executes instructions to convert raw data into a first logical address and payload data, where the first logical address describes metadata about the payload data. A hardware translation unit executes instructions to translate the first logical address into a first physical address on a storage device. A hardware load/storage unit stores the first logical address and the payload data at the first physical address on the storage device. A hardware exclusive OR (XOR) unit compares two logical address vectors to derive a Hamming distance between the two logical address vectors. A hardware retrieval unit retrieves other payload data that is stored at a second physical address whose second logical address is within a predefined Hamming distance from the first logical address, thus allowing payload data from the two logical addresses to be grouped/associated with one another.
申请公布号 US9195608(B2) 申请公布日期 2015.11.24
申请号 US201313896461 申请日期 2013.05.17
申请人 International Business Machines Corporation 发明人 Friedlander Robert R.;Kraemer James R.;Ungar David M.
分类号 G06F12/10;G06F12/02 主分类号 G06F12/10
代理机构 Law Office of Jim Boice 代理人 Pivnichny John R.;Law Office of Jim Boice
主权项 1. A system comprising: a hashing logic, wherein the hashing logic executes instructions to convert raw data into a first logical address and payload data, wherein the first logical address describes metadata about the payload data; a hardware translation unit, wherein the hardware translation unit executes instructions to translate the first logical address into a first physical address on a storage device; a hardware load/storage unit, wherein the hardware load/storage unit stores the first logical address and the payload data at the first physical address on the storage device; a hardware exclusive OR (XOR) unit, wherein the hardware XOR unit compares two logical address vectors to derive a Hamming distance between the two logical address vectors; a hardware retrieval unit, wherein the hardware retrieval unit retrieves other payload data that is stored at a second physical address whose second logical address is within a predefined Hamming distance from the first logical address, and wherein a Hamming distance between the first logical address and the second logical address is derived by the hardware XOR unit; an address vector converter, wherein the address vector converter is hardware that converts each “zero” bit in an address vector to a “negative one” bit to generate a converted address vector; an address vector summer, wherein the address vector summer is hardware that sums each bit position from two or more address vectors to generate a summation address vector; and a threshold logic, wherein the threshold logic compares the summation address vector to the first logical address, wherein a group of logical addresses whose summation address vector matches the first logical address is determined to address a storage location of a same class of payload data.
地址 Armonk NY US